[FreeScale]/KINETIS2013. 11. 2. 23:00

K20 EVM - Kinetis Cortex-M4 SPI 테스트1

K20 EVM - Kinetis Cortex-M4 SPI 테스트


Cortex-M4 K20 SPI 관련 자료 정리.

SPI클럭은 최대 25로 동작한다.


K20 SPI블록도




K20 SPI 제어 레지스터

MKL25Z 보다 기능이 많아서 레지스터가 많이 복잡해 졌다. 하지만 SPIx_MCR, SPIxCTA 레지스터만 보면 대부분의 기본 기능을 사용할 수 있다. 물론 다양한 설정으로 좀더 복잡한 기능을 구현 가능하다.






11 CLR_TXF

Clear TX FIFO

Flushes the TX FIFO. Writing a 1 to CLR_TXF clears the TX FIFO Counter. The CLR_TXF bit is always

read as zero.

0 Do not clear the TX FIFO counter.

1 Clear the TX FIFO counter.



10 CLR_RXF

Flushes the RX FIFO. Writing a 1 to CLR_RXF clears the RX Counter. The CLR_RXF bit is always read

as zero.

0 Do not clear the RX FIFO counter.

1 Clear the RX FIFO counter.



9-8 SMPL_PT

Sample Point

Controls when the DSPI master samples SIN in Modified Transfer Format. This field is valid only when

CPHA bit in CTARn[CPHA] is 0.

00 0 system clocks between SCK edge and SIN sample

01 1 system clock between SCK edge and SIN sample

10 2 system clocks between SCK edge and SIN sample

11 Reserved



K20 SPI 초기화 함수

void SPI0_Init(void)

{

SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK;      //Turn on clock to D module  

  SIM_SCGC6 |= SIM_SCGC6_SPI0_MASK; 

//_SPI0_IO_INIT();

PORTC_PCR5=PORT_PCR_MUX(2);//PC5,SPI0 SCK

PORTC_PCR6=PORT_PCR_MUX(2);//PC6,SPI0 SOUT

PORTC_PCR7=PORT_PCR_MUX(2);//PC7,SPI0 SIN

//SPI_C1_CPOL_MASK

//SPI_C1_CPHA_MASK

Sbi(SPI0_MCR, SPI_MCR_HALT_MASK|SPI_MCR_MSTR_MASK);

Sbi(SPI0_MCR, SPI_MCR_DCONF(0x0));


Cbi(SPI0_MCR, SPI_MCR_MDIS_MASK);

Sbi(SPI0_MCR, SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK);


SPI0_TCR = SPI_TCR_SPI_TCNT(0x00);  

Cbi(SPI0_CTAR0, SPI_CTAR_DBR_MASK);


 

SPI0_CTAR0 = SPI_CTAR_FMSZ(7); //8bit

SPI0_SetSpeed(SPI_SPEED_4MHZ);

//SPI Mode

//Sbi(SPI0_CTAR0, SPI_CTAR_CPHA_MASK);

//Sbi(SPI0_CTAR0, SPI_CTAR_CPOL_MASK);

    //SPI0_MCR: HALT=0

Cbi(SPI0_MCR, SPI_MCR_HALT_MASK);

}




SPIxCTA 레지스터






17-16 PBR

Baud Rate Prescaler

Selects the prescaler value for the baud rate. This field is used only in Master mode. The baud rate is the

frequency of the SCK. The system clock is divided by the prescaler value before the baud rate selection

takes place. See the BR field description for details on how to compute the baud rate.

00 Baud Rate Prescaler value is 2.

01 Baud Rate Prescaler value is 3.

10 Baud Rate Prescaler value is 5.

11 Baud Rate Prescaler value is 7.


3-0 BR

Baud Rate Scaler

Selects the scaler value for the baud rate. This field is used only in Master mode. The prescaled system

clock is divided by the Baud Rate Scaler to generate the frequency of the SCK. The baud rate is

computed according to the following equation:

SCK baud rate = (fSYS/PBR) x [(1+DBR)/BR]



K20 SPI 송수신 함수

unsigned char SPI0_WriteReadByte(unsigned char Data)

{

//SPTEF - 1 이면 데이터 전송

    unsigned char temp; 


while (!(SPI0_SR & SPI_SR_TFFF_MASK)) ;  

//Write char to SPI     

SPI0_PUSHR = Data;


    

//SPRF - 1 이면 데이터 수신

//while (!(SPI0_SR & SPI_SR_RXCTR_MASK)) ;  

    while (!(SPI0_SR & SPI_SR_RFDF_MASK)) ;  

    

    temp = SPI0_POPR;

    SPI0_SR = SPI_SR_TFFF_MASK | (SPI0_SR&SPI_SR_RFDF_MASK);

return temp;    

}



K20 SPI SPIxTCR 레지스터

좀 특이한 사항으로 하드웨어적으로 TCR레지스터가 있어 전송 회수를 알 수 있고 이를 이용해서 버퍼 관리가 편리해 진다. 이부분은 좀더 들여다 볼 필요가 있는것 같다.







K20 SPI모드 설정













Posted by nexp

댓글을 달아 주세요