[LPC1756 EVM] SPI 테스트
LPC1756 SPI 초기화 함수
SPI 클럭 설정 PCLKSEL1에서 아래와 같이 설정 가능하다.
00 PCLK_peripheral = CCLK/4 00
01 PCLK_peripheral = CCLK
10 PCLK_peripheral = CCLK/2
11 PCLK_peripheral = CCLK/8, except for CAN1, CAN2, and
CAN filtering when “11” selects = CCLK/6.
LPC1756 SPI 송수신 함수
SPI 모드 설정 레지스터
LPC1756 SPI 초기화 함수
void SPI0_Init(void)
{
int i;
volatile unsigned char Dummy;
//SPI Power On
PCONP |= (1 << 21);
//SPI 핀설정
PINSEL0 |= 0x80000000;
PINSEL1 |= 0x28;
PCLKSEL1 |= 0x400; //CCLK
// PCLKSEL1 |= 0x800; // CCLK/2
// PCLKSEL1 |= 0xC00; // CCLK/8
SPI0_SetSpeed(SPI_SPEED_1MHZ);
//SSP disable
SSP0CR1_bit.SSE = 0;
/* Set DSS data to 8-bit, Frame format SPI, CPOL = 0, CPHA = 0, and SCR is 15 */
SSP0CR0 = 0x0007;
/* SSPCPSR clock prescale register, master mode, minimum divisor is 0x02 */
SSP0CPSR = 0x2;
for ( i = 0; i < FIFOSIZE; i++ )
{
Dummy = SSP0DR; /* clear the RxFIFO */
}
//NVIC_IntEnable(NVIC_SSP1);
//NVIC_IntPri(NVIC_SSP1,HIGHEST_PRIORITY);
// SSP Enabled
SSP0CR1 = SSPCR1_SSE;
}
{
int i;
volatile unsigned char Dummy;
//SPI Power On
PCONP |= (1 << 21);
//SPI 핀설정
PINSEL0 |= 0x80000000;
PINSEL1 |= 0x28;
PCLKSEL1 |= 0x400; //CCLK
// PCLKSEL1 |= 0x800; // CCLK/2
// PCLKSEL1 |= 0xC00; // CCLK/8
SPI0_SetSpeed(SPI_SPEED_1MHZ);
//SSP disable
SSP0CR1_bit.SSE = 0;
/* Set DSS data to 8-bit, Frame format SPI, CPOL = 0, CPHA = 0, and SCR is 15 */
SSP0CR0 = 0x0007;
/* SSPCPSR clock prescale register, master mode, minimum divisor is 0x02 */
SSP0CPSR = 0x2;
for ( i = 0; i < FIFOSIZE; i++ )
{
Dummy = SSP0DR; /* clear the RxFIFO */
}
//NVIC_IntEnable(NVIC_SSP1);
//NVIC_IntPri(NVIC_SSP1,HIGHEST_PRIORITY);
// SSP Enabled
SSP0CR1 = SSPCR1_SSE;
}
SPI 클럭 설정 PCLKSEL1에서 아래와 같이 설정 가능하다.
00 PCLK_peripheral = CCLK/4 00
01 PCLK_peripheral = CCLK
10 PCLK_peripheral = CCLK/2
11 PCLK_peripheral = CCLK/8, except for CAN1, CAN2, and
CAN filtering when “11” selects = CCLK/6.
LPC1756 SPI 송수신 함수
SUINT SPI0_WriteReadByte(SUINT Data)
{
//TxFIFO is not full
while ( !(SSP0SR & SSPSR_TNF) );
SSP0DR = Data;
//Wait until the Busy bit is cleared
while ( !(SSP0SR & SSPSR_RNE) );
return SSP0DR;
}
{
//TxFIFO is not full
while ( !(SSP0SR & SSPSR_TNF) );
SSP0DR = Data;
//Wait until the Busy bit is cleared
while ( !(SSP0SR & SSPSR_RNE) );
return SSP0DR;
}
SPI 모드 설정 레지스터
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