IAR 4.11A Compilation

 

 
 

 

Introduction

The goal of this demonstration project is to describe the IAR compilation with an AT91-based target.

In this case the all code:

Before REMAP link at 0x100000 process at 0x00000 Flash Internal RAM 0x0200000 to 0x2040000

                        Init embedded peripheral

                                    Flash wait sate

                        PLL

                        AIC

            Copy vector area 0x000000 to 0x200000

            Load PC at 0x01000xxx

REAMP

Now the Flash is located at 0x100000

And RAL located at 0x000000

 

The conditional assembly it’s used to compile or not compile the Remap instruction in the Cstarup .s79 file.

 

- RAM:

Assembler

-         The Remap is not allowed the “RAM_DEBUG” is defined in the assembler parameter

Linker

Use the a”t91SAM7S64_16KRAM.xcl” this file include new definition to internal high address

Debugger

Use the a SAM7_RAM.mac”

- FLASH.

Assembler

-         The Remap is process allowed the “RAM_DEBUG” must be not defined in the assembler parameter

Linker

Use the at91SAM7S64_REMAP.xcl” this file include new definition to internal high address for FLASH and RAM

Debugger

Use the a” SAM7.mac”

-          

IAR Workspace

RAM_Debug

RAM application for debug

Flash_Debug

Flash application for debug to be

Flash_flash

Flash application for load using the IAR utility

 Compilation files

Interrupt.eww

IAR main project file (Workspace)

Interrupt.ewp

IAR workbench project file

Cstartup_xxxx.ewp

Cstartup file

resource/

Project resource files directory

resource/at91SAM7S64_Remap.xcll

Linker file for the Flash application which defines the memory mapping and sections for the target board Unused

resource/at91_lnk_ram.xcl

Linker file for the RAM application which defines the memory mapping and sections for the target board new NEW

resource/SAM7_RAM.mac>

Script file for setting the processor before to download and to debug the RAM application using a JTAG ICE interface new

resource/SAM7.mac

Script file for setting the processor before to download and to debug the Flash application using a JTAG ICE interface new

SrcIAR/

Specific source code directory

SrcIAR/Cstartup.s79

Cstartup code which includes the reference for INTRAMSTART_REMAP define in linker file

SrcIAR/Cstartup_sam7.c

Cstartup code in C

settings/

IAR Setting directory

Ram_Debug/

IAR object and list directory

Flash_Debug/

IAR object and list directory for the Flash application

Flash_Flash/

IAR object and list directory for the Flash application

Troubleshooting

 

1) The J-LINK not support to stop a core when it’s works in some specific mode, IRQ, FIQ,ABORT, … in this case the following popup window will be process

- Error popup J-Link Driver windows write:

            Unexpected mode: X0000092 (Expected 0x1f or 0x17)

In this case selects Abandon

- Error popup J-Link Driver windows write:

            FATAL ERROR:

Unexpected mode: X0000092 (Expected 0x1f or 0x17)

Session aborted

In this case selects OK

            Failed to load the file” C: …..”

            The file may be corrupt or in a format debugger does not support.

In this case selects OK

- Error popup IAR Embedded Workbench IDE windows write:

            A fatal error has occurred:

The debugger will terminate.

In this case selects OK

            Failed to load the file” C: …..”

            The file may be corrupt or in a format debugger does not support.

Now the application process in board is sopped.

            You can restart the debugger

 

Cause: J-link no support to stop the core in the interrupt routine.

2) execUserReset().

This macro is not supported in the IAR workbench after the Flash utility.

This macro is needed for set correctly the AIC peripheral and set the REMAP correctly.

 

Create a specific Flash workspace “Flash_flash, for

2) Flash download touble.

The Remap application it links at 0x100000 and need a specific flash loader.