Version: 2.0

AT91 SAM7S Analog to Digital Software Example

The goal of this demonstration project is to show how to use AT91 ARM-Based Software Packages. This project will run a test of AT91SAM7Sxxx ATMEL parts and corresponding evaluation board AT91SAM7S Evaluation board. It's ADC implementation example.
This project contains four examples:

  1. The first example (called OneShot) allows the user in using the ADC with the easiest setting: one shot ADC conversion with a software triggering,
  2. The second example (called Multi) allows the user in using the ADC with only one channel but by using hardware triggering via a Timer/Counter output,
  3. The third example (called Multishotchan) allows the user in using the ADC in hardware triggering mode + multi channel,
  4. The last example (called AdcPdc) allows the user in starting PDC transfer.

Reference Documents

Name

Reference

ARM-Based Software Package

6016

AT91SAM7Sxxx Data sheet

 

Contents:

 

Source Files
Hardware resource

Description

One Shot ADC Conversion

 

Source Files:

 

Description Files

srcxxx/SAM7Board.h

SAM7 evaluation board description

 

Startup Files

srcxxx/Cstartup.xxx

AT91SAM7S64 Microcontroller reset entry point

srcxxx/Cstartup_SAM7.c

AT91SAM7S64 Initialization called by Assembly code in Cstartup

 

C Files

../src/mainoneshot.c or main_multi.c or main_multishotchan or main_AdcPdc.c

Main entry point according to the selected sub-project.

 

Hardware resource:

AT91SAM7S product

- ADC

- Timer:Timer/Counter 0

SAM7S evaluation board

In all examples, the channel 0 is used to convert analogical to digital values. The Multishotchan example used four channels: CH0, CH1, CH4 and CH5.

Description:

As described in introduction, this project contains 4 sub-projects.
The following setting are common for all sub-projects:
MCK Clock: 47.3923 MHz (USB frequency)
ADC Clock: With a prescaler equal to 0x4, ADC = 4.73923 MHz (defined in PRESCALER variable),
Startup Time of the ADC equal to 0xC = 21.91... µs (see the intrinsic electrical characteristics of the ADC in the datasheet),
Tracking time equal to 3 ADC Clock cycles.
Common on-board hardware connections: J7,J8, J9 and J10 are connected, respectively, on PA17/AD0, PA18/AD1, AD4 and AD5.

Remark: All projects do not use overrunning status bit in order to warn missed read after a polling method on a specific channel: OVRE[0..7] for each channel or GOVRE when the application is using PDC transfer (about the last sub-project).